Nikil Mehta

Graduate Student of Professor André DeHon.

Research Interests

As a member of the IC Group, I am broadly interested in the physical implementation of computation.
In a former life I was primarily a device physicist and electrical engineer, and have since been focused
on how we can best use large numbers of small devices for computation. Therefore, my interests are:

Nanoscale Physical Devices
Programmable Architectures (FPGA, multi-processor, nanoscale)
Compilation and CAD
System Abstractions (compute models, system architectures)

Currently I am working on the GraphStep project, both on the compute model and on the FPGA
architecture and implementation.

Publications

Packet-Switched vs. Time-Multiplexed FPGA Overlay Networks
Nachiket Kapre, Nikil Mehta, Michael deLorimier, Raphael Rubin, Henry Barnor,
Michael J. Wilson, Michael Wrighton, André DeHon.
in FCCM 2006.
[local pdf], [copyright notice]

GraphStep: A System Architecture for Sparse-Graph Algorithms
Michael deLorimier, Nachiket Kapre, Nikil Mehta, Dominic Rizzo, Ian Eslick,
Raphael Rubin, Tomas Uribe, Thomas F. Knight, Jr., André DeHon.
in FCCM 2006.
[local pdf], [copyright notice]

Fetch Halting on Critical Load Misses
Nikil Mehta, Brian Singer, R. Iris Bahar, Michael Leuchtenberg, Richard Weiss.
in ICCD 2004, pp. 244-249.
[abstract], [IEEE pdf], [local pdf], [copyright notice]

Theses

Time-Multiplexed FPGA Overlay Networks On Chip
Master's Thesis, 2006.
[local pdf], [caltech library]

Notes

Some course notes that actually *make sense* are coming here soon.

Education

California Institute of Technology '04-Present
Brown University '03
Hawken School '99

Contact

Email:
Address:	California Institute of Technology
	Department of Computer Science, MC 256-80
	1200 E. California Blvd.
	Pasadena, CA 91125
Lab:	Jorgensen 84 (IC Group)
Office:	Jorgensen 164E
Phone:	x8388
PGP:	Public Key