@Book{gerez_vlsida99,
  author = 	 {Sabih H. Gerez},
  title = 	 {Alagorithms for VLSI Design Automation},
  publisher = 	 {John Wiley \& Son Ltd},
  year = 	 {1999},
  note = {Optional text: general reference and background material,
          Day 21 required p. 133-166}
}

@BOOK{devadas_logic_synth94,
	AUTHOR = {Srinivas Devadas and Abhijit Ghosh and Kurt Keutzer},
	TITLE = {Logic Synthesis},
	PUBLISHER = {McGraw-Hill},
	YEAR = {1994},
	ADDRESS = {New York},
        note={Day  2 required p. 190--198 (section 7.8),
              Day  4 required p. 59--91 (chapter 4), 
              Day  5 required p. 151--184 (7-7.7),
              Day  6 required p. 225--256 (8.1--8.3)
              canonical reference text for logic synthesis}         
}

@InProceedings{dagon_dac87,
  author={Kurt Keutzer},
  title={DAGON: Technology Binding and Local Optimization by DAG Matching},
  booktitle={Proceedings of the 24th ACM/IEEE Design Automation Conference (DAC)},
  year=1987,
  pages={341--347},
  note={Day 2 supplemental -- this is the canonical paper, but not the best tutorial}
}

@Article{lut_area_depth_tr_on_vlsi_systems94,
  author = 	 {Jason Cong and Yuzheng Ding},
  title = 	 {On Area/Depth Trade-Off in LUT-Based FPGA Technology Mapping},
  journal = 	 {IEEE Transactions on VLSI Design},
  year = 	 1994,
  volume =	 2,
  number =	 2,
  month =	 {June},
  pages =	 {137-148},
  note = {Day 3 optional/supplemental}
}

@Article{twolevel_overview_intergration94,
  author={Olivier Coudert},
  title={Two-level Logic Minimization:  An Overview},
  journal={Integration, The VLSI Journal},
  volume=17,
  pages={97--140},
  year=1994,
  note={Day 4 optional}
  }

@Article{multilevel_synth_procieee90,
  author={Robert Brayton and G. D. Hachtel and Alberto Sangiovanni-Vincentelli},
  title={Multilevel Logic Synthesis},
  journal={Proceedings of the IEEE},
  volume=78,
  number=2,
  pages={264--300},
  month={February},
  year=1990,
  note={Day 5 supplemental}
  }

@ARTICLE{exact_state_assign_tcad91,
	AUTHOR = {Srinivas Devadas and A. Richard Newton},
	TITLE = {Exact Algorithms for Output Encoding, State Assignment,
	and Four-Level Boolean Minimization},
	JOURNAL = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
	YEAR = {1991},
	VOLUME = {10},
	NUMBER = {1},
	PAGES = {13--27},
	MONTH = {January},
        note={Day 7 required}

@ARTICLE{mustang_tcad,
	AUTHOR = {Srinivas Devadas and Hi-Keung Ma and A.R. Newton and Alberto Sangiovanni-Vincentelli},
	TITLE = {MUSTANG:  State Assignment of Finite State Machines Targeting Multilevel Logic Implementations},
	JOURNAL = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
	YEAR = {1988},
	VOLUME = {7},
	NUMBER = {12},
	PAGES = {1290-1300},
	MONTH = {December},
        note={Day 7 optional}
    
}

@InProceedings{ftsm_mapld2004
  author = 	 {Gary Burke and Stephanie Taft},
  title = 	 {Fault Tolerant State Machines},
  booktitle =	 {Proceedings of the Military and Aerospace Programmable  Logic Device International Conference},
  year =	 2004,
  note = {Day 8 required}
}

@InProceedings{which_ced_itc2000,
  author = 	 {Subhashish Mitra and Edward J. McCluskey},
  title = 	 {Which Concurrent Error Detection Scheme to Choose?},
  booktitle =	 {Proceedings of the International Test Conference},
  pages =	 {985--994},
  year =	 2000,
  note = {Day 9 required}
}

@inproceedings{chaff_dac2001,
   author = "Matthew W. Moskewicz and Conor F. Madigan and Ying Zhao and Lintao Zhang and Sharad Malik",
    title = "{Chaff: Engineering an Efficient {SAT} Solver}",
    booktitle = "Proceedings of the 38th Design Automation Conference ({DAC}'01)",
    year = "2001",
    note={Day 10 required}
    }

@INPROCEEDINGS{leiserson_retime83,
	AUTHOR = {Charles Leiserson and Flavio Rose and James Saxe},
	TITLE = {Optimizing Synchronous Circuitry by Retiming}, 
	BOOKTITLE = {Third Caltech Conference On VLSI},
	YEAR = {1983},
	MONTH = {March},
        note = {Day 11 required}
}

@InProceedings{pan_retime_lut_fpga98,
  author={Peichen Pan and Chih-Chang Lin},
  title={A New Retiming-based Technology Mapping Algorithm for LUT-based FPGAs},
  booktitle={Proceedings of the 1998 International Symposium on Field-Programmable Gate Arrays (FPGA'98)},
  year=1998
  pages={35--42},
  note={Day 12 required}
  
}

@INPROCEEDINGS{fmpart_dac82,
	AUTHOR = {C. M. Fiduccia and R. M. Mattheyses},
	TITLE = {A Linear Time Heuristic for Improving Network Partitions},
	BOOKTITLE = {Proceedings of the 19th Design Automation Conference},
	YEAR = {1982},
	PAGES = {175-181},
        note = {Day 13 required}      
}

@Article{alpert_bipartioning_survey,
  author = 	 {Charles Alpert and A. B. Kahng},
  title = 	 {Recent Directions in Netlist Partitioning:  A Survey},
  journal = 	 {Integration:  the VLSI Journal},
  year = 	 1995,
  volume =	 19,
  number =	 {1--2},
  pages =	 {1--81},
  FTP =  {\urllink{http://vlsicad.cs.ucsd.edu/Publications/Journals/j20.pdf}},
  note = {Day 13 supplemental}
}

@Article{hauck_bipartitioning_survey,
  author = 	 {Scott Hauck and Gaetano Borriello},
  title = 	 {An Evaluation of Bipartitioning Techniques},
  journal = 	 {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year = 	 1997,
  volume =	 16,
  number =	 8,
  pages =	 {849--866},
  month =	 {August},
  FTP = {\urllink{http://www.ee.washington.edu/people/faculty/hauck/publications/PartitionJ.pdf}},
  note = {Day 13 supplemental}
}

@Misc{metis_pubs_online,
  title = 	 {METIS Publication List},
  howpublished = {\urllink{http://www-users.cs.umn.edu/~karypis/metis/publications/main.html}},
  note = {Day 13 supplemental}
}

@InProceedings{hauck_replicate_part_iccad97,
  author = 	 {Morgan Enos and Scott Hauck and Majid Sarrafzadeh},
  title = 	 {Replication for Logic Bipartitioning},
  booktitle ={Proceedings of the International Conference on Computer-Aided Design},
  pages = {342--349},
  FTP =  {\urllink{http://www.ece.nwu.edu/~hauck/publications/ICCADreplicate.pdf} },
  year = 1997,
  note={Day 13 supplemental}
}

@Article{hall_quadratic_placement_ms70,
  author = 	 {Kenneth M. Hall},
  title = 	 {An $r$-dimensional Quadratic Placement Algorithm},
  journal = 	 {Managment Science},
  year = 	 1970,
  volume =	 17,
  number =	 3,
  month =	 {November},
  pages =	 {219--229},
  note = {Day 14 required}      
}

@book{clr_algorithms90,
  author={Thomas Cormen and Charles Leiserson and Ronald Rivest},
  title={Introduction to Algorithms},
  year=1990,
  publisher={MIT Press},
  note={Day 14 required p579--599, general reference for algorithms}

@InProceedings{fbb_iccad94,
  author = 	 {Honghua Yang and D. F. Wong},
  title = 	 {Efficient Network Flow Based Min-Cut Balanced Partitioning},
  booktitle = 	 {Proceedings of the IEEE International Conference on Computer-Aided Design},
  year = 	 1994,
  notes={Day 14 supplemental}
}

@InProceedings{boppana_focs87,
  author = 	 {Ravi Boppana},
  title = 	 {Eigenvalues and Graph Bisection:  An Average-case Analysis},
  booktitle = 	 {Proceedings of the 28th Annual Symposium on the Foundations of Computer Science},
  pages =	 {280--285},
  year =	 1987,
  note = {Day 14 supplemental}
}

@Book{hochbaum97,
  editor =	 {Dorit S. Hochbaum},
  title = 	 {Approximation Algorithms for NP-Hard Problems},
  publisher = 	 {PWS Publishing Company},
  year = 	 1997,
  note = {Day 14 supplemental, chapter 5 by Shmoys}
}

@Article{twoway_replcut_trcad95,
  author = 	 {Lung-Tien iu and Ming-Ter Kuo and Chung-Kuan Cheng and T. C. Hu},
  title = 	 {A Replication Cut for Two-Way Partitioning},
  journal = 	 {IEEE Transactions on Computer-Aided Design of Integerated Circuits and Systems},
  year = 	 1995,
  volume =	 14,
  number =	 5,
  pages =	 {623--630},
  month =	 {May},
  note = {Day 14 supplemental}
}

@Article{wong_replcut_trcad97,
  author = 	 {Wai-Kei and D. F. Wong},
  title = 	 {Minimum Replication Min-Cut Partitioning},
  journal = 	 {IEEE Transactions on Computer-Aided Design of Integerated Circuits and Systems},
  year = 	 1997,
  volume =	 16,
  number =	 10,
  pages =	 {1221--1227},
  month =	 {October},
  note = {Day 14 supplemental}
}

@inproceedings{satroute_fpga1999,
   author = "Gi-Joon Nam and Karem A. Sakallah and Rob A. Rutenbar",
   title = "Satisfiability-Based Layout Revisisted:  Detailed Routing of
   Complex FPGAs Via Search-Based Boolean SAT",
   booktitle = "Proceedings of the International Symposium on
   Field-Programmable Gate Arrays",
   year = "1999"
   pages = "167--175",
   notes={Day 15 supplemental}
   }

@inproceedings{satplace_iccad1989,
   author = "Srinivas Devadas",
   title = "Optimal Layout via Boolean Satisfiability"
   booktitle = "Proceedings of ICCAD",
   year = "1989"
   pages = "294--297",
   notes={Day 15 supplemntal}
   }

@InProceedings{part_place_ispd97,
  author = 	 {D. J. Huang and A. B. Kahng},
  title = 	 {Partitioning-Based Standard-Cell Global Placement with an Exact
     Objective},
  booktitle = 	 {Proceedings of the ACM/IEEE International Symposium on Physical Design},
  pages =	 {18-25},
  year =	 1997,
  month =	 {April},
  FTP = \urllink{http://vlsicad.ucsd.edu/Publications/Conferences/c66.pdf},
  note = {Day 16 required}
}

@Book{sait_vlsipda97,
  author =	 {Sadiq Sait and Habib Youssef},
  title = 	 {VLSI Physical Design Automation: Theory and Pracice},
  publisher = 	 {McGraw Hill},
  year = 	 1997,
  note ={Day 16 supplemental p. 155-166, background reference for physical CAD}
}

@MISC{painless_cg94,
   AUTHOR = {Jonathan Richard Shewchuk},
   TITLE = {An Introduction to the Conjugate Gradient Method Without the
   Agonizing Pain},
   EDITION = {1.25},
   YEAR = {1994},
   FTP = \urllink{http://www.cs.utah.edu/~cs6220/Resources/painless-conjugate-gradient.pdf},
  note = {Day 16,17 supplemental.}

@ARTICLE{kirkpatrick_science83,
	AUTHOR = {S. Kirkpatrik and C. D. {Gellatt, Jr.} and M. P. Vecchi},
	TITLE = {Optimization by Simulated Annealing},
	JOURNAL = {Science},
	YEAR = {1983},
	VOLUME = {220},
	NUMBER = {4598},
	PAGES = {671-680},
	MONTH = {May},
        note = {Day 17 required}
}

@Article{opt_pplace_trcad2000,
  author = 	 {A. E. Caldwell and Andrew B. Kahng and I. L. Markov},
  title = 	 {Optimal Partitioners and End-case Placers for Standard-cell Layout},
  journal = 	 {IEEE Transactions on Computer-Aided Design},
  year = 	 {2000},
  volume = 	 {19},
  number = 	 {11},
  pages = 	 {1304--1313},
  month = 	 {November},
  URL = \urllink{http://vlsicad.ucsd.edu/Publications/Journals/j46.pdf},
  note = {Day 17 supplemental}
}

@InProceedings{adapt_rlimit_dac2005,
  author={Ken Eguro and Scott Hauck and Akshay Sharma},
  title={Architecture-Adaptive Range Limit Windowing for Simulated
         Annealing FPGA Placement},
  booktitle={Procedings of the Design Automation Conference (DAC)},
  year=2005,
  month={June},
  note={Day 17 supplemental}
}

@InProceedings{sa44_dac1988,
  author={Jimmy Lam and Jean-Marc Delosme},
  title={Performance of a New Annealing Schedule},
  booktitle={Procedings of the Design Automation Conference (DAC)},
  year=1988,
  month={June},
  note={Day 17 supplemental}
}

@InProceedings{map_linplace_iccad97,
  author={Jinan Lou and Amir H. Salek and Massoud Pedram},
  title= {An Exact Solution to Simultaneous Technology Mapping and Linear Placement Problem for Trees},
   booktitle={Proceedings of the 1997 International Conference on
       Computer Aided Design (ICCAD'97)},
   month={November},
   year=1997,
   note={Day 18 supplemental}
}

@InProceedings{area_delay_cover_dac92,
  title={A Near Optimal Algorithm for Technology Mapping Minimizing Area
  under Delay Constraints},
  author={Kamal Chaudhary and Massoud Pedram},
  year=1992,
  pages={492--498},
  note={Day 18 required}
}

@Article{intro_schd_dt95,
  author = 	 {Robert Walker and Samit Chaudhuri},
  title = 	 {Introduction to the Scheduling Problem},
  journal = 	 {IEEE Design and Test of Computers},
  year = 	 1995,
  volume =	 12,
  number =	 2,
  pages =	 {60--69},
  month =	 {Summer},
  note  = {Day 19,20 required}
}

@Article{mrcsbb_aiietr78,
  author = 	 {Joel Stinson and Edward Davis and Basheer Khumawala},
  title = 	 {Multiple Resource--Constrained Scheduling Using Branch and Bound},
  journal = 	 {AIIE Transactions},
  year = 	 1978,
  volume =	 10,
  number =	 3,
  pages =	 {252--259},
  month =	 {September},
  note  = {Day 19,20 supplemental}

}

@InProceedings{np_ilpschedule_nsdc2004,
  author={William Plishker and Kaushik Ravindran and Niraj Shah and Kurt Keutzer},
  title={Automated Task Allocation for Network Processors},
  booktitle={Proceedings of the Network Systems Design Conference},
  pages={235--245},
  year=2004,
  note={Day 20 supplemental}
  
}

@InProceedings{left_edge_daw71,
  author={A. Hashimoto and J. Stevens},
  title={Wire Routing by Optimizing Channel Assignment with Large Apertures},
  booktitle={Proceedings of the 8th Design Automation Workshop},
  pages={155--169},
  year=1971,
  note={Day 21 supplemental}
  
}

@Book{route3d1995,
  author =	 {Naveed Sherwani and Siddharth Bhingarde and Anand Panyam},
  title = 	 {Routing in the Third Dimension},
  publisher = 	 {IEEE Press},
  year = 	 1995,
  note ={Day 21 supplemental -- over the cell, maximal independent sets}
}

@INPROCEEDINGS{pathfinder_fpga95,
	AUTHOR = {Larry McMurchie and Carl Ebling},
	TITLE = {PathFinder:  A Negotiation-Based Performance-Driven
                  Router for FPGAs},
	YEAR = {1995},
	BOOKTITLE = {Proceedings of the ACM/SIGDA International Symposium on  Field-Programmable Gate Arrays}, 
	ORGANIZATION = {ACM},
	MONTH = {February},
	PAGES = {111--117},
        URL = {\urllink{http://www.cs.washington.edu/research/projects/lis/www/papers/postscript/mcmurchie-FPGA95.ps}},
        note = {Day 22 required}

}