@Book{product_design_and_development95,
  author =	 {Karl T. Ulrich and Steven D. Eppinger},
  title = 	 {Produce Design and Development},
  publisher = 	 {McGraw-Hill, Inc.},
  year = 	 1995,
  note = {Day 3: Chapter 5 required},
}
@InProceedings{area_delay_cover_dac92,
  title={A Near Optimal Algorithm for Technology Mapping Minimizing Area
  under Delay Constraints},
  author={Kamal Chaudhary and Massoud Pedram},
  year=1992,
  pages={492--498},
  note={Day 3 reccommended
}


@InProceedings{pan_retime_lut_fpga98,
  author={Peichen Pan and Chih-Chang Lin},
  title={A New Retiming-based Technology Mapping Algorithm for LUT-based FPGAs},
  booktitle={Proceedings of the 1998 International Symposium on Field-Programmable Gate Arrays (FPGA'98)},
  year=1998
  pages={35--42}
}
[
PDF Link]
@BOOK{devadas_logic_synth94,
	AUTHOR = {Srinivas Devadas and Abhijit Ghosh and Kurt Keutzer},
	TITLE = {Logic Synthesis},
	PUBLISHER = {McGraw-Hill},
	YEAR = {1994},
	ADDRESS = {New York},
        note={Day  8 required p. 225--256 (8.1--8.3)}
}
@Article{seq_verify_trcad88,
  author = 	 {Srinivas Devadas and Hi-Keung Tony Ma and Richard Newton},
  title = 	 {On the Verification of Sequential Machines at Differing
  Levels of Abstraction},
  journal = 	 {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year = 	 1988,
  volume =	 7,
  number =	 6,
  pages =	 {713--722},
  month =	 {June},
  note = {Day 9 required}
}

[IEEE Xplore Link]

@inproceedings{dill_processor_verify_cav94,
    author="Jerry R. Burch and David L. Dill",
    title="Automatic Verification of Pipelined Microprocessor Control",
    booktitle="Conference on Computer-Aided Verification",
    editor="David L. Dill",
    Series="Lecture Notes in Computer Science",
    Volume="818",
    Publisher="Springer-Verlag",
    Year="1994",
    Pages="68--80",
    note={Day 10 required}
}
[
PS from Stanford]
@inproceedings{chaff_dac2001,
   author = "Matthew W. Moskewicz and Conor F. Madigan and Ying Zhao and Lintao Zhang and Sharad Malik",
    title = "{Chaff: Engineering an Efficient {SAT} Solver}",
    booktitle = "Proceedings of the 38th Design Automation Conference ({DAC}'01)",
    year = "2001",
    note={Day 13 required}
    }
[
links from citesear]
@inproceedings{satroute_fpga1999,
   author = "Gi-Joon Nam and Karem A. Sakallah and Rob A. Rutenbar",
   title = "Satisfiability-Based Layout Revisisted:  Detailed Routing of
   Complex FPGAs Via Search-Based Boolean SAT",
   booktitle = "Proceedings of the International Symposium on
   Field-Programmable Gate Arrays",
   year = "1999"
   pages = "167--175",
   notes={Day 14 required}
   }
[
Paper from ACM Digital Library] [paper from author's web page]
@inproceedings{satplace_iccad1989,
   author = "Srinivas Devadas",
   title = "Optimal Layout via Boolean Satisfiability"
   booktitle = "Proceedings of ICCAD",
   year = "1989"
   pages = "294--297",
   notes={Day 14}
   }

[another relevant article in TR Computer]