@Article{forcedirected_trcas79,
  author = 	 {Neil R. {Quinn, Jr.} and Melvin A. Brewuer},
  title = 	 {A Forced Directed Component Placement Procedure for Printed Circuit Boards},
  journal = 	 {IEEE Transactions on Circuits and Systems},
  year = 	 1979,
  volume =	 26,
  number =	 6,
  pages =	 {377--388},
  month =	 {June},
  note = {Day 2 required}
}
@Article{forcedirected_trcas81,
  author = 	 {Satoshi Goto},
  title = 	 {An Efficient Algorithm for the Two-Dimensional Placement Problem in Electrical Circuit Layout},
  journal = 	 {IEEE Transactions on Circuits and Systems},
  year = 	 1981,
  volume =	 28,
  number =	 1,
  pages =	 {12--18},
  month =	 {January},
  note = {Day 2 required}
}

@Article{pathdelay_forcedirected_trcad02,
  author = 	 {Yih-Chih Chou and Youn-Long Lin},
  title = 	 {Effective Enforcement of Path-Delay Constraints in Performance-Driven Placement},
  journal = 	 {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year = 	 2002,
  volume =	 21,
  number =	 1,
  pages =	 {15--22},
  month =	 {January},
  note = {Day 2 supplemental}
}
@Book{product_design_and_development95,
  author =	 {Karl T. Ulrich and Steven D. Eppinger},
  title = 	 {Produce Design and Development},
  publisher = 	 {McGraw-Hill, Inc.},
  year = 	 1995,
  note = {Day 3: Chapter 5 required},
}
@InProceedings{systolic_combinatorial_algorithms,
  author = 	 {L. J. Guibas and H. T. Kung and C. D Thompson},
  title = 	 {Direct VLSI Implemenation of Combinatorial Algorithms},
  booktitle = 	 {Caltech Conference on VLSI},
  year =	 1979,
  month =	 {January},
  pages =	 {509--525},
  note = {Day 5 required}
}
@InProceedings{systolic_graph_schedule_icsa88,
  author = 	 {Oscar H. Ibarra and Tao Jiang and Jik H. Chang and Michael A. Palis},
  title = 	 {Systolic Algorithsm for Some Scheduling and Graph Problems},
  booktitle = 	 {Proceedings of the International Conference on Systolic Arrays},
  pages =	 {247--256},
  year =	 1988,
  month =	 {May},
  publisher =	 {IEEE},
        NOTE = {Day 5 supplemental}
}
@ARTICLE{splash_computer91,
	AUTHOR = {Maya Gokhale and William Holmes and Andrew Kopser and Sara Lucas and Ronald Minnich and Douglas Sweely and Daniel Lopresti},
	TITLE = {Building and Using a Highly Programmable Logic Array},
	JOURNAL = {IEEE Computer},
	YEAR = {1991},
	VOLUME = {24},
	NUMBER = {1},
	PAGES = {81--89},
	MONTH = {January},
        NOTE = {Day 5 supplemental}
}
@Book{splash2_book,
  author = 	 {Duncan Buell and Jeffrey Arnold and Walter Kleinfelder},
  title = 	 {Splash 2:  FPGAs in a Custom Computing Machine},
  publisher = 	 {IEEE Computer Society Press},
  year = 	 1996,
  address =	 {10662 Los Vasqueros Circle, PO Box 3014, Los
                  Alamitos, CA 90720-1264},
  NOTE = {Day 5 supplemental, especially chapter 8}
}

@Article{data_parallel_cacm86,
  author = 	 {W. Daniel Hillis and Guy L. Steele},
  title = 	 {Data Parallel Algorithms},
  journal = 	 {Communications of the ACM},
  year = 	 1986,
  volume =	 29,
  number =	 12,
  pages =	 {1170--1183},
  month =	 {December},
  note = {Day 6 required}
}
[ACM Digital Library Page]

@BOOK{devadas_logic_synth94,
	AUTHOR = {Srinivas Devadas and Abhijit Ghosh and Kurt Keutzer},
	TITLE = {Logic Synthesis},
	PUBLISHER = {McGraw-Hill},
	YEAR = {1994},
	ADDRESS = {New York},
        note={Day  8 required p. 225--256 (8.1--8.3)}
}
@Article{seq_verify_trcad88,
  author = 	 {Srinivas Devadas and Hi-Keung Tony Ma and Richard Newton},
  title = 	 {On the Verification of Sequential Machines at Differing
  Levels of Abstraction},
  journal = 	 {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year = 	 1988,
  volume =	 7,
  number =	 6,
  pages =	 {713--722},
  month =	 {June},
  note = {Day 9 required}
}

@inproceedings{dill_processor_verify_cav94,
    author="Jerry R. Burch and David L. Dill",
    title="Automatic Verification of Pipelined Microprocessor Control",
    booktitle="Conference on Computer-Aided Verification",
    editor="David L. Dill",
    Series="Lecture Notes in Computer Science",
    Volume="818",
    Publisher="Springer-Verlag",
    Year="1994",
    Pages="68--80",
    note={Day 10 required}
}
[
PS from Stanford]
@InProceedings{area_delay_cover_dac92,
  title={A Near Optimal Algorithm for Technology Mapping Minimizing Area
  under Delay Constraints},
  author={Kamal Chaudhary and Massoud Pedram},
  year=1992,
  pages={492--498},
  note={Day 11 required}
}


Delay-Optimal Technology Mapping by DAG Covering (1998)
Logic Decomposition during Technology Mapping (1995)
Simultaneous Logic Decomposition with Technology Mapping in FPGA Designs